SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability
| Autor: | Chao Ma, Takashi Kawanami, Masakazu Hioki, Tadashi Nakagawa, Hanpei Koike, Toshiyuki Tsutsumi, Yasuhiro Ogasahara, Toshihiro Sekigawa |
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| Jazyk: | angličtina |
| Rok vydání: | 2014 |
| Předmět: |
Engineering
business.industry Transistor lcsh:Applications of electric power Biasing static leakage power reduction lcsh:TK4001-4102 Chip law.invention Threshold voltage silicon on thin buried oxide (SOTB) field programmable gate array (FPGA) law Electronic engineering Hardware_INTEGRATEDCIRCUITS Electrical and Electronic Engineering fine-grained body biasing Field-programmable gate array business AND gate Leakage (electronics) Electronic circuit Hardware_LOGICDESIGN |
| Zdroj: | Journal of Low Power Electronics and Applications, Vol 4, Iss 3, Pp 188-200 (2014) Journal of Low Power Electronics and Applications Volume 4 Issue 3 Pages 188-200 |
| ISSN: | 2079-9268 |
| Popis: | Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories. One of the most important issues in the modern FPGA is the reduction of its static leakage power consumption. Flex Power FPGA, which has been proposed to overcome this problem, uses a body biasing technique to implement the fine-grained threshold voltage (Vt) programmability in the FPGA. A low-Vt state can be assigned only to the component circuits along the critical path of the application design mapped on the FPGA, so that the static leakage power consumption can be reduced drastically. Flex Power FPGA is an important application target for the SOTB (silicon on thin buried oxide) device, which features a wide-range body biasing ability and the high sensitivity of Vt variation by body biasing, resulting in a drastic subthreshold leakage current reduction caused by static leakage power. In this paper, the Flex Power FPGA test chip is fabricated in SOTB technology, and the functional test and performance evaluation of a mapped 32-bit binary counter circuit are performed successfully. As a result, a three orders of magnitude static leakage reduction with a bias range of 2.1 V demonstrates the excellent Vt controllability of the SOTB transistors, and the 1.2 V bias difference achieves a 50× leakage reduction without degrading speed. |
| Databáze: | OpenAIRE |
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