High Level Modeling and Hardware Implementation of Image Processing Algorithms Using XSG
| Autor: | Houcine Bourouba, Hakim Doghmane, Salah Toumi, El-Bay Bourennane, Kamel Messaoudi |
|---|---|
| Přispěvatelé: | Mohamed Cherif Messaadia University - Université Mohamed-Chérif Messaadia [Souk Ahras], Département d'Electronique et de Télécommunications, Laboratoire des Télécommunications, Université du 8 Mai 1945 [Guelma, Algérie], Université Bourgogne Franche-Comté [COMUE] (UBFC), Université Faculté des Sciences de l'ingénieur, Université Badji Mokhtar Annaba, université de Bourgogne, IMVIA |
| Jazyk: | angličtina |
| Rok vydání: | 2019 |
| Předmět: |
business.industry
Computer science Interface (computing) [INFO.INFO-GR] Computer Science [cs]/Graphics [cs.GR] 020207 software engineering Image processing 02 engineering and technology Systems modeling Edge detection [INFO.INFO-GR]Computer Science [cs]/Graphics [cs.GR] VHDL Digital image processing 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing business MATLAB Field-programmable gate array computer Computer hardware computer.programming_language |
| Zdroj: | 4th International Conference On Electrical Engineering and Control Applications, ICEECA 2019 4th International Conference On Electrical Engineering and Control Applications, ICEECA 2019, Dec 2019, Constantine, Algeria Lecture Notes in Electrical Engineering ISBN: 9789811564024 |
| Popis: | International audience; Design of Systems-on-Chip has become very common especially with the remarkable advances in the field of high-level system modeling. In recent years, Matlab also offers a Simulink interface for the design of hardware systems. From a high-level specification, Matlab provides self-generation of HDL codes and/or FPGA configuration codes while providing other benefits of easy simulation. In addition, a large part of the Systems-on-Chip use at least one image processing algorithm and at the same time border detection is one of the most used algorithms. This paper presents a study and a hardware implementation of various algorithms of borders detection realized under Xilinx System-Generator. The various algorithms are implemented using Xilinx FPGA device, the simulation and synthesis results are also compared. We use the Xilinx Zed-Board for physical implementations in-the-loop. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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