High frequency characterization of compact N+Poly/Nwell varactor using waffle-layout

Autor:	Christophe Gaquiere, Y. Morandini, J.-F. Larchanche
Přispěvatelé:	Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)
Jazyk:	angličtina
Rok vydání:	2008
Předmět:	Engineering business.industry 020208 electrical & electronic engineering 0202 electrical engineering electronic engineering information engineering Electrical engineering 020206 networking & telecommunications 02 engineering and technology business Cmos process Capacitance Varicap
Zdroj:	Proceedings of the 8th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2008 8th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2008 8th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2008, 2008, United States. pp.167-170, ⟨10.1109/SMIC.2008.48⟩
DOI:	10.1109/SMIC.2008.48⟩
Popis:	The high frequency characterization of a new waffle layout for N+Poly/Nwell varactor has been studied in STMicroelectronics 65 nm CMOS process. We compare this new waffle layout with model of standard multifingers varactor. In addition to the area saving, the waffle MOS varactor also provides enhancement to the RF merit figure of varactor through the serial resistance and substrate capacitance improvement.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e8bc8323f18b20070bf227e4478bcacb https://hal.science/hal-00361118 Zobrazit plný text záznamu