High-Efficiency Silicon Inverted Pyramid-Based Passivated Emitter and Rear Cells
Autor: | Yuan Shengzhao, Cui Yanfeng, Zhuang Yufeng, Liu Ying, Zengguang Huang, Linxing Shi, Gao Kun, Wenzhong Shen, Fan Yuan, Yimao Wan |
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Rok vydání: | 2020 |
Předmět: |
Materials science
Passivation Silicon ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION chemistry.chemical_element Hardware_PERFORMANCEANDRELIABILITY MACE 02 engineering and technology Inverted pyramids 010402 general chemistry 01 natural sciences Monocrystalline silicon Stack (abstract data type) High-efficiency Hardware_INTEGRATEDCIRCUITS lcsh:TA401-492 PERC General Materials Science Wafer Common emitter Nano Express business.industry 021001 nanoscience & nanotechnology Condensed Matter Physics Isotropic etching Si solar cell 0104 chemical sciences chemistry Optoelectronics lcsh:Materials of engineering and construction. Mechanics of materials 0210 nano-technology business Short circuit |
Zdroj: | Nanoscale Research Letters, Vol 15, Iss 1, Pp 1-9 (2020) Nanoscale Research Letters |
ISSN: | 1556-276X |
DOI: | 10.1186/s11671-020-03404-y |
Popis: | Surface texturing is one of the most important techniques for improving the performance of photovoltaic (PV) device. As an appealing front texture, inverted pyramid (IP) has attracted lots of research interests due to its superior antireflection effect and structural characteristics. In this paper, we prepare high-uniform silicon (Si) IPs structures on a commercial monocrystalline silicon wafer with a standard size of 156 × 156 mm2 employing the metal-assisted chemical etching (MACE) and alkali anisotropic etching technique. Combining the front IPs textures with the rear surface passivation of Al2O3/SiNx, we fabricate a novel Si IP-based passivated emitter and rear cell (PERC). Benefiting from the optical superiority of the optimized IPs and the improvement of electrical performance of the device, we achieve a high efficiency of 21.4% of the Si IP-based PERC, which is comparable with the average efficiency of the commercial PERC solar cells. The optimizing morphology of IP textures is the key to the improvement of the short circuit current Isc from 9.51 A to 9.63 A; meanwhile, simultaneous stack SiO2/SiNx passivation for the Si IP-based n+ emitter and stack Al2O3/SiNx passivation for rear surface guarantees a high open-circuit voltage Voc of 0.677 V. The achievement of this high-performance PV device demonstrates a competitive texturing technique and a promising prospect for the mass production of the Si IP-based PERC. |
Databáze: | OpenAIRE |
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