Analog/RF performance of multichannel SOI MOSFET
| Autor: | Sylvie Lepilliet, M. Paccaud, Tao Chuan Lim, C. Buj-Dufournet, N. Vulliet, Gilles Dambrine, Thomas Ernst, E. Bernard, O. Rozeau, Francois Danneville, Bernard Guillaumot |
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| Přispěvatelé: | Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF) |
| Jazyk: | angličtina |
| Rok vydání: | 2009 |
| Předmět: |
010302 applied physics
Engineering business.industry Transconductance Electrical engineering Silicon on insulator 02 engineering and technology 021001 nanoscience & nanotechnology 01 natural sciences Capacitance Electronic Optical and Magnetic Materials Logic gate Low-power electronics 0103 physical sciences MOSFET Scattering parameters Optoelectronics Radio frequency Electrical and Electronic Engineering 0210 nano-technology business |
| Zdroj: | IEEE Transactions on Electron Devices IEEE Transactions on Electron Devices, Institute of Electrical and Electronics Engineers, 2009, 56, pp.1473-1482. ⟨10.1109/TED.2009.2021438⟩ IEEE Transactions on Electron Devices, 2009, 56, pp.1473-1482. ⟨10.1109/TED.2009.2021438⟩ |
| ISSN: | 0018-9383 |
| DOI: | 10.1109/TED.2009.2021438⟩ |
| Popis: | In this paper, for the first time, we present a detailed RF experimental and simulation study of a 3-D multichannel SOI MOSFET (MCFET). Being different from the conventional planar technology, the MCFET features a total of three self-aligned TiN/HfO2 gate stacks fabricated on top of each other, allowing current to flow through the three undoped ultrathinned silicon bodies (UTBs). In other words, the operation of the MCFET is theoretically based on two UTB double-gate SOIs and a single-gate UTB fully depleted SOI (FDSOI) at the bottom. Using on-wafer S-parameters, the RF/analog figures-of-merit of an MCFET with a gate length of 50 nm are extracted and discussed. Thanks to the enormous transconductance (gm) and very low output conductance, the RF/analog performances of MCFET-voltage gain (A VI) and early voltage (V EA) are superior compared with that of the single-gate UTB-FDSOI. However, these advantages diminish in terms of transition frequency (fT), due to the large total input gate capacitances (C GG). This inspires the introduction of spacer engineering in MCFET, aiming at improving both C GG and fT. The sensitivity of the spacer length to the RF/analog performances is experimentally analyzed, and the performance optimization is validated using ac simulation. This paper concludes that optimized MCFETs are a serious contender to the mainstream MOSFETs including FinFETs for realizing future low-power analog applications. |
| Databáze: | OpenAIRE |
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