Analysis and simulation of parallel signature analyzers
| Autor: | Theo J. Powell, Satish M. Thatte, Thirumalai Sridhar, D. S. Ho |
|---|---|
| Jazyk: | angličtina |
| Předmět: |
Digital electronics
Computer science business.industry Design tool Integrated circuit Pascal (programming language) Multiple input law.invention Computational Mathematics Most significant bit Computational Theory and Mathematics law Modeling and Simulation Modelling and Simulation Error detection and correction business Algorithm computer Shift register computer.programming_language |
| Zdroj: | Computers & Mathematics with Applications. (5-6):537-545 |
| ISSN: | 0898-1221 |
| DOI: | 10.1016/0898-1221(87)90081-2 |
| Popis: | Parallel signature analyzers (PSAs) implemented as multiple input linear feedback shift registers are very useful in compressing test response data in digital circuits. In this paper, some analytical results on error detection using a class of PSAs are presented. The concept of monitoring the most significant bit of a PSA is introduced. Finally, a PASCAL simulator, called SIGLYZER, to study the effectiveness of PSAs in detecting errors in test response data, is described. The use of the SIGLYZER as a design tool is also explained. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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