A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer Using a Self-Synchronized Gating Injection Technique for Software-Defined Radios

Autor:	Deng, Wei, AHMED, MAGDI MUSA, Musa, Ahmed Magdi Hassan, Okada, Kenichi, Matsuzawa, Akira
Rok vydání:	2014
Předmět:	Frequency synthesizer Physics Frequency divider Injection locking Phase-locked loop Phase noise Electronic engineering dBc Software-defined radio Electrical and Electronic Engineering Electronic circuit
Zdroj:	IEEE Journal of Solid-State Circuits. 49:1984-1994
ISSN:	1558-173X 0018-9200
Popis:	This paper describes a compact and low-power frequency synthesizer with quadrature phase output for software-defined radios (SDRs). The proposed synthesizer is constructed using a core phase-locked loop (PLL), which is coupled with a fractional-N injection-locked frequency divider (ILFD). The fractional-N injection-locking operation is achieved by the proposed self-synchronized gating injection technique. The principle of a fractional-N injection locking operation and the concept of the proposed circuits are described in detail. Analysis for predicting the locking range of the proposed fractional-N ILFD is investigated. A digital calibration scheme is adopted in order to compensate for process, voltage, and temperature (PVT) variations. Implemented in a 65 nm CMOS process, this work demonstrates continuous frequency coverage from 10 MHz to 6.6 GHz with quadrature phase output while occupying a small area of 0.38 mm 2 and consuming 16 to 26 mW, depending on the output frequency. The normalized phase noise achieves -135.3 dBc/Hz at an offset of 3 MHz and -95.1 dBc/Hz at an offset of 10 kHz, both from a carrier frequency of 1.7 GHz.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e17398ddba38cf819e002beaa364a50b https://doi.org/10.1109/jssc.2014.2334392 Zobrazit plný text záznamu