Accurately modelling of parasitics in power electronics circuits using an easy RLC-extraction method
| Autor: | Ratmir Gelagaev, Jeroen Zwysen, Pieter Jacqmaer, Johan Driesen |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2012 |
| Předmět: |
Engineering
business.industry Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Ringing Electronic circuit simulation Inductance Power electronics Electronic engineering Overshoot (signal) Hardware_INTEGRATEDCIRCUITS RLC circuit Parasitic extraction business Hardware_LOGICDESIGN Electronic circuit |
| Popis: | A method for accurately modelling parasitics in power electronic circuits, is presented in this paper. The freeware software programs FastCap and FastHenry are used to create a model of the printed circuit board tracks, consisting of resistances, self and mutual inductances, and self and mutual capacitances. This model can be easily loaded into a standard circuit simulator such as Spice, together with models for other components, such as the diodes, transistors, coils and capacitances. Thus, the power electronic circuit can easily be simulated in the time domain, returning electrical currents and voltages typically being subject to ringing effects and overshoot. ispartof: pages:1441-1446 ispartof: 2012 IEEE International Instrumentation and Measurement Technology Conference Proceedings pages:1441-1446 ispartof: 2012 IEEE International Instrumentation and Measurement Technology Conference location:Graz, Austria date:13 May - 16 May 2012 status: published |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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