Memory-Aware Embedded Control Systems Design
| Autor: | Wanli Chang, Chun Jason Xue, Samarjit Chakraborty, Sidharta Andalam, Dip Goswami, Lei Ju |
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| Přispěvatelé: | Electronic Systems, Cyber-Physical Systems Center Eindhoven, Embedded Control Systems Lab, CompSOC Lab- Predictable & Composable Embedded Systems |
| Rok vydání: | 2017 |
| Předmět: |
Instrumentation and control engineering
Computer science quality of control (QoC) Embedded control 02 engineering and technology memory analysis Memory cache Embedded control systems nonuniform sampling Real-time Control System Memory architecture 0202 electrical engineering electronic engineering information engineering Process control System on a chip Electrical and Electronic Engineering business.industry 020208 electrical & electronic engineering Cyber-physical system Industrial control system Computer Graphics and Computer-Aided Design 020202 computer hardware & architecture Control system Embedded system Algorithm design Cache business Software |
| Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36(4), 586-599. Institute of Electrical and Electronics Engineers |
| ISSN: | 1937-4151 0278-0070 |
| Popis: | Control applications are often implemented on highly cost-sensitive and resource-constrained embedded platforms, such as microcontrollers with a small on-chip memory. Typically, control algorithms are designed using model-based approaches, where the details of the implementation platform are completely ignored. As a result, optimizations that integrate platform-level characteristics into the control algorithms design are largely missing. With the emergence of cyber-physical systems (CPS)-oriented thinking, there has lately been a strong interest in co-design of control algorithms and their implementation platforms, leading to work on networked control systems and computation-aware control algorithms design. However, there has so far been no work on integrating the characteristics of a memory architecture into the design of control algorithms. In this paper we, for the first time, show that accounting for the impact of on-chip memory (or cache) reuse on the performance of control applications motivates new techniques for control algorithms design. This leads to significant improvement in quality of control for given resource availability, or more efficient implementations of embedded control applications. We believe that this paper opens up a variety of possibilities for memory-related optimizations of embedded control systems, that will be pursued by researchers working on computer-aided design for CPS. |
| Databáze: | OpenAIRE |
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