High Level Synthesis of an Event-Driven Windowing Process
| Autor: | Laurent Fesquet, Saeed Mian Qaisar, Jean Simatic |
|---|---|
| Přispěvatelé: | Effat University, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), ANR-11-LABX-0025-01,PERSYVAL-lab,Systèmes et Algorithmes Pervasifs au confluent des mondes physique et numérique(2011), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), ANR-11-LABX-0025,PERSYVAL-lab,Systemes et Algorithmes Pervasifs au confluent des mondes physique et numérique(2011) |
| Jazyk: | angličtina |
| Rok vydání: | 2017 |
| Předmět: |
Signal processing
Computer science 020206 networking & telecommunications Context (language use) 02 engineering and technology Signal Window function Sampling (signal processing) Asynchronous communication High-level synthesis 0202 electrical engineering electronic engineering information engineering Electronic engineering 020201 artificial intelligence & image processing [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics Algorithm Register-transfer level |
| Zdroj: | 3rd International Conference on Event-Based Control, Communication and Signal Processing (EBCCSP 2017) 3rd International Conference on Event-Based Control, Communication and Signal Processing (EBCCSP 2017), May 2017, Funchal, Portugal. pp.1-8, ⟨10.1109/EBCCSP.2017.8022807⟩ EBCCSP |
| Popis: | International audience; This work is a contribution to enhance the signal processing chain required in modern systems. The idea is to take advantage of the interesting features of both event-driven and well-established uniform sampling and signal processing algorithms. In this context, authors have proposed original windowing techniques for the event-driven sampled signal, activity selection and local parameter extraction. These are called as Activity Selection Algorithms (ASA). The proposed techniques correlate the windowing function length, shape and resampling frequency with the input signal time variations. In this paper, the ASA and an adaptive rate resampler with zero order interpolation are implemented in C. Using high level synthesis tools, synchronous and asynchronous register transfer level descriptions are synthesized on a commercial CMOS 40 nm technology. The synthesis results are presented. A comparison of the average power consumption between asynchronous and synchronous implementations is made. The proposed system functionality is also verified with the help of analytic test signals. Results have shown a compression, in terms of samples, of 1.5 to 1.6 respectively compared to the simple event-driven level-crossing sampling and by 5.8 to 9.3 compared to the uniform sampling based systems. The asynchronous (resp. synchronous) implementation of ASA and resampler only consumes in average 28pJ/sample (resp. 238 pJ/sample). |
| Databáze: | OpenAIRE |
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