Low delay rate adaptive pacemaker using FPGA embedded piezoelectric sensor
Autor: | Meenakshi Sharma, Sonali Ray, Basant Kumar, Ravi Prakash Tewari, Nitin Sahai, Rohini Srivastava |
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Rok vydání: | 2020 |
Předmět: |
Pacemaker
Artificial Computer science Piezoelectric sensor Pulse generator 010401 analytical chemistry 0206 medical engineering Biomedical Engineering Low delay Equipment Design 02 engineering and technology General Medicine Sense (electronics) Models Theoretical Chip 020601 biomedical engineering 01 natural sciences 0104 chemical sciences Power (physics) Reduction (complexity) Heart Rate Electronic engineering Humans ComputerSystemsOrganization_SPECIAL-PURPOSEANDAPPLICATION-BASEDSYSTEMS Field-programmable gate array Exercise |
Zdroj: | Journal of Medical Engineering & Technology. 44:423-430 |
ISSN: | 1464-522X 0309-1902 |
DOI: | 10.1080/03091902.2020.1799097 |
Popis: | This paper presents the hardware implementation of low delay, power-efficient, rate-adaptive dual-chamber pacemaker (RDPM) using a piezoelectric sensor. Rate adaptive pacemaker has the ability to sense the patient's activity by means of some special sensors and it controls the pacing rate according to the patient's activity. Ideally, there should be no delay between sensing and the subsequent pacing operation performed by the pacemaker. However, delay in the responses of various components in the circuitry produces an accumulative delay effect in any practical circuit. Physical activity and the physiological needs of the patient can be easily adapted by the rate-responsive pacemakers using a wide range of sensor information. The piezo-electric sensor recognises the pressure on human muscles because of physical activity and converts it to an electrical signal, which is received by the pulse generator of the pacemaker. When the patient is in the rest mode, the heart rate is the only parameter that is to be detected by the pacemaker. Thus, the heart rate and the physical activity both are the inevitable parameters for the design of RDPM. Performance analysis of the proposed RDPM shows a significant reduction in the delay between sensing and pacing. Device utility analysis shows that the proposed design not only requires lesser memory but also reduces the number of components on the chip. Therefore, it becomes very clear that the proposed pacemaker design will consume much lesser power. |
Databáze: | OpenAIRE |
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