A Self-Bias NAND Gate and its Application to Non-Overlapping Clock Generator for Extremely Low-Voltage CMOS LSIs

Autor:	Kaori Matsumoto, Hikaru Sebe, Daisuke Kanemoto, Ryo Matsuzuka, Tetsuya Hirose, Osamu Maida
Rok vydání:	2020
Předmět:	Physics Physics and Astronomy (miscellaneous) business.industry Low voltage cmos General Engineering Electrical engineering General Physics and Astronomy NAND gate Clock generator Self-serving bias business
Zdroj:	Extended Abstracts of the 2020 International Conference on Solid State Devices and Materials.
DOI:	10.7567/ssdm.2020.a-7-02
Popis:	This paper presents a self-bias NAND (SBNAND) gate and its application to a non-overlapping (NOL) clock generator for extremely low-voltage CMOS LSIs. The SBNAND, consisting of a main NAND gate and feedback inverter, improves the output performance at extremely low supply voltage V DD by controlling the body-bias voltages V BS of the main NAND gate. Measurements of a proof-of-concept chip demonstrated that our proposed NOL clock generator using SBNANDs can operate at the extremely low V DD of 60 mV.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dd55ee61ac22175a8a61cdfb18dbdeaf https://doi.org/10.7567/ssdm.2020.a-7-02 Zobrazit plný text záznamu