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Random Access Memory (ReRAM) Consisting of Binary-Transition-Metal-Oxides T. Moriyama, K. Kinoshita, R. Koishi and S. Kishida Graduate School of Engineering, Tottori University, 4-101 Koyama-Minami, Tottori 680-8552 Japan Tottori University Electronic Display Reserch Center, 2-522-2 Koyama-Kita, Tottori 680-0941, Japan kinoshita@ele.tottori-u.ac.jp Resistive Random Access Memory (ReRAM) is been studied and expected as one of the next generation memories. ReRAM can maintain data in a high resistance (RH) and low resistance (RL). Applied a voltage called “Set” (from RH to RL) and “Reset” (from RL to RH), ReRAM can be written and erased. One of its excellent characteristics is high speed switching. Pulse switching in 10 ns is reported[1], which it’s much faster than flash memory (100 μs/bit). Many papers studied the characteristics of endurance and high speed switching, however, few papers discuss what switching speed depends on. It is essential for improving the credibility of switching speed. To clarified them, in a start, we investigated the tendency between pulse switching time and the voltage which the sample is applied, especially in Reset process. We fabricated test samples consisting of Pt/NiO/Pt on Ti/SiO2/Si substrate. A 60-nm-thick NiO film was deposited by dc sputtering at 300 deg. in Ar, O2 (10%) mixed gas. φ40 μm Pt top electrodes was formed by shadow mask. Set and Reset are done by DC sweep in a semiconductor parameter analyzer (SPA) and pulse in a pulse generator, respectively. In Set, SPA is set 5.0 V sweep in 20 mV step and 2 mA current compliance. In Reset, changing parameters of applied pulse (height Vp and width twid), we investigated two experiments, the EXP A and B. We set Vp = 0.30 V and twid = 500 μs (const.) in the EXP A. Then, Vp is increased 50 mV step until a sample is erased. In the EXP B, on the other hand, we set Vp =1.0, 1.2, 1.4 V (const.) and twid = 5 ns. Then, twid is increased 2 ns step. We measured the resistance in SPA which is set 0.20 V sweep in 20 mV step and used at 0.10 V as a read voltage. Voltage (both) and current (EXP A only) wave forms in Reset are measured using an oscilloscope (OSC). Fig. 1 show the resistance changing in the EXP A. A sample applied a pulse in Vp =0.70 V, the resistance increases from 1 kΩ to 15 kΩ. Inset of Fig. 1 show the voltage and current wave form measured in OSC. The voltage and current is suddenly increased and decreased respectively, which means the sample is erased. We defined Vreset; the value of voltage which the pulse is applied, and reset time treset = t(Vreset + ΔV * 90 %) t(Vreset) in the EXP A. Fig. 2 show the resistance changing in the EXP B. A sample applied a pulse in Vp = 1.4 V (const.) and twid = 13 ns, it’s resistance increases from 1 kΩ to 8.5 kΩ, which means the sample is erased. Inset of Fig. 2 show the voltage wave form measured in OSC; the current wave form can’t be measured because of impedance mismatching. We defined that treset is the twid when the sample is erased, and that Vreset is the Vp in the EXP B. Inset of Fig. 3 show the distribution, gauss fitting and cumulative probability of Vreset in the EXP A. It finds we applied the voltage pulse enough to being erased in the EXP B, because probability of erasing at Vp > 1.0 V area is about 100 %. Fig. 3 show relations between treset and Vreset, which RL is about 1kΩ. In the EXP A, treset is decreased exponentially by Vreset being increased, however, there is a different tendency in the EXP B. Compared with TiON[2], there is a tendency like the EXP A, which their erasing voltage on pulse are lower than them on DC sweep. On the characteristics of endurance, on the other hand, 2.5 V, 50 ns is used in erasing, which is similar to EXP B and it is higher than them on DC sweep. Compared with TiO2[3] and Ti-doped NiO[4] which other studies report, moreover, they are similar to our results. In this way, relations between treset and Vreset are different whether erasing voltage on pulse is much higher than on sweep or lower than, which is essential to discuss the tendency of treset. |
