The role of SiN/GaN cap interface charge and GaN cap layer to achieve enhancement mode GaN MIS-HEMT operation
Autor: | Edward Wasige, Karol Kalna, M. H. Alqaysi, B. C. Ubochi, K. Ahmeda, Abdullah Al-Khalidi |
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Rok vydání: | 2020 |
Předmět: |
Materials science
Passivation Gallium nitride 02 engineering and technology High-electron-mobility transistor 01 natural sciences law.invention chemistry.chemical_compound law 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Breakdown voltage Electrical and Electronic Engineering Safety Risk Reliability and Quality 010302 applied physics business.industry 020208 electrical & electronic engineering Transistor Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials Threshold voltage chemistry Optoelectronics business Layer (electronics) Voltage |
ISSN: | 0026-2714 |
Popis: | The thickness increase of gallium nitride (GaN) cap layer from 2 nm to 35 nm to achieve an enhancement mode GaN MIS-HEMT (Metal-Insulator-Semiconductor High-Electron-Mobility Transistor) with a threshold voltage (Vth) of +0.5 V is studied using TCAD simulations. The simulations are calibrated to measured I-V characteristics of the 1 μm gate length GaN MIS-HEMT with the 2 nm thick GaN cap. A good agreement at low and high drain voltages (VDS=1 V and 5 V) between simulations and measurements is achieved by using a quantum-corrected drift-diffusion transport model. The enhancement mode GaN MIS-HEMT with a GaN cap thickness of 35 nm achieves Vth = + 0.5 V thanks to positive interface traps occurring between the SiN passivation layer and the GaN cap as reported experimentally. The simulations indicate that a parasitic channel is created at the interface between the SiN layer and the 35 nm GaN cap. Our study also shows an increase in the breakdown voltage from 100 V to 870 V when a thickness of the GaN cap layer increases from 15 nm to 35 nm. |
Databáze: | OpenAIRE |
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