An Implementation of a Grid Square Codes Generator on a RISC-V Processor
Autor: | Keiichi Sato, Jubee Tada |
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Rok vydání: | 2022 |
Předmět: |
010302 applied physics
Out-of-order execution Computer science 02 engineering and technology Grid 01 natural sciences Square (algebra) 020202 computer hardware & architecture Computational science 0103 physical sciences RISC-V 0202 electrical engineering electronic engineering information engineering Benchmark (computing) Execution unit Field-programmable gate array Geographic coordinate system |
Zdroj: | CANDAR (Workshops) |
ISSN: | 2185-2847 2185-2839 |
DOI: | 10.15803/ijnc.12.1_204 |
Popis: | This paper implements an execution unit that generates grid square codes from latitude and longitude on a RISC-V processor and evaluates its performance. In recent years, a statistical analysis which uses grid square codes has been focused. Although grid square codes are obtained from latitude and longitude based on several equations, this calculation requires a long computing time because it needs a lot of floating-point instructions.In this paper, an execution unit which generates grid square codes from latitude and longitude is designed, and the instruction which generates grid square codes by using the unit is implemented on a RISC-V processor. The proposed execution unit can generate the corresponding grid square code from latitude and longitude in one cycle.As a benchmark, a program that counts the number of times randomly generated latitudes and longitudes match the specified grid square codes is used. Experimental results show the in-order RISC-V processor with the proposed unit which implemented on an FPGA achieves a 36.6% reduction of execution time compared to the original processor. In addition, the performance evaluation of the out-of-order RISC-V processor with the proposed unit by using the gem5 simulator shows a 23.9% reduction of execution cycles compared to the original processor. |
Databáze: | OpenAIRE |
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