A New Figure of Merit, ${\Delta V_{\text {DIBLSS}} /(I_{\rm {d},{\mathrm{ sat}}} /I_{\rm {sd},{\mathrm{ leak}}} )}$ , to Characterize Short-Channel Performance of a Bulk-Si n-Channel FinFET Device

Autor: Chien-Ting Lin, Yi-Chuen Eng, Chin-Hao Kuo, Steven Hsu, Osbert Cheng, Chia-Jung Hsu, Ted Wang, Chen Ming-Chih, Pei-Wen Wang, Chih-Wei Yang, Chih-Yi Wang, Chun Mao Chiou, I-Chang Wang, Tzu-Feng Chang, Andy Lai, Wen-Yuan Pang, Luke Hu
Rok vydání: 2017
Předmět:
short–channel control
Hardware_PERFORMANCEANDRELIABILITY
02 engineering and technology
01 natural sciences
0103 physical sciences
Hardware_INTEGRATEDCIRCUITS
0202 electrical engineering
electronic engineering
information engineering

Saturation (graph theory)
Figure of merit
Electrical and Electronic Engineering
Device parameters
Logic figures of merit (FoMs)
010302 applied physics
Physics
++%24%5CDelta+V%5F{%5Cmathrm{+DIBLSS}}+%24+<%2Ftex-math>+<%2Finline-formula>+<%2Fitalic>%22"> $\Delta V_{\mathrm{ DIBLSS}} $
Hardware_MEMORYSTRUCTURES
lightly doped drain (LDD)
Condensed matter physics
bulk n–FinFETs
Subthreshold conduction
business.industry
Doping
Electrical engineering
020206 networking & telecommunications
Electronic
Optical and Magnetic Materials

Delta-v (physics)
Subthreshold swing
N channel
lcsh:Electrical engineering. Electronics. Nuclear engineering
business
lcsh:TK1-9971
++%24I%5F{%5Crm+d%2C{%5Cmathrm{+sat}}}+%2FI%5F{%5Crm+sd%2C{%5Cmathrm{+leak}}}%24+<%2Ftex-math>+<%2Finline-formula>+<%2Fitalic>%22"> $I_{\rm d
{\mathrm{ sat}}} /I_{\rm sd
{\mathrm{ leak}}}$

Biotechnology
Zdroj: IEEE Journal of the Electron Devices Society, Vol 5, Iss 1, Pp 18-22 (2017)
ISSN: 2168-6734
Popis: This paper aims to investigate the device parameters, including drain-induced barrier lowering (DIBL), subthreshold swing (SS), and saturation drive current, $I_{\rm d,{\mathrm{ sat}}} $ , of bulk-Si n-channel FinFET devices (bulk n-FinFETs). The impact of lightly doped drain (LDD) process on the performance of bulk n-FinFETs is also examined in this paper. According to our measured data, excluding LDD in bulk n-FinFETs not only reduces mask costs but it also enables slightly better short-channel control compared to the inclusion of LDD. A new figure of merit, $\Delta V_{\mathrm{ DIBLSS}} /(I_{\rm d,{\mathrm{ sat}}} /I_{\rm sd,{\mathrm{ leak}}} )$ , is introduced for monitoring short-channel performance of bulk n-FinFETs, where $\Delta V_{\mathrm{ DIBLSS}} $ accounts for the DIBL and SS, and $I_{\rm sd,{\mathrm{ leak}}} $ is the source/drain subthreshold off-state leakage current.
Databáze: OpenAIRE