Prebond Testing of Weak Defects in TSVs
| Autor: | Rosa Rodriguez-Montanes, D. Arumi, Joan Figueras |
|---|---|
| Přispěvatelé: | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
| Rok vydání: | 2016 |
| Předmět: |
Engineering
Design for testing Overhead (engineering) Integrated circuits design for testability Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Integrated circuit 01 natural sciences Electric inverters law.invention Circuit stability Automatic test equipment law 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Through-silicon vias Electrical and Electronic Engineering 010302 applied physics Resistive touchscreen business.industry Circuit faults Enginyeria electrònica [Àrees temàtiques de la UPC] Process (computing) Stability analysis Inverters Built-in self-test (BIST) 020202 computer hardware & architecture Built-in self-test Hardware and Architecture Fault coverage Circuits integrats integrated circuit (IC) testing business Stability Software |
| Zdroj: | UPCommons. Portal del coneixement obert de la UPC Universitat Politècnica de Catalunya (UPC) Recercat. Dipósit de la Recerca de Catalunya instname |
| ISSN: | 1557-9999 1063-8210 |
| DOI: | 10.1109/tvlsi.2015.2448594 |
| Popis: | Through-silicon vias (TSVs) are critical elements in 3-D integrated circuits susceptible to defects during fabrication and lifetime. It is desirable to detect defective TSVs in the early steps of the fabrication process to prevent stacking yield loss. Thus, the development of effective prebond testing techniques becomes of great importance. In this direction, recent research effort has been devoted to the development of two main prebond techniques: 1) prebond probing and 2) built-in self-test (BIST) techniques. The prebond probing poses economic and technological challenges, whereas current BIST proposals have disadvantages for certain solutions. Hence, there is still a need for an effective methodology in terms of fault coverage, area overhead, and test time. This paper proposes a BIST technique based on a simple unbalanced circuit comparing the behavior of two TSVs. Electrical simulation results show the viability of the proposal to detect weak defects, i.e., resistive opens and resistive bridges, adding reasonable area overhead in a short-test application time. Furthermore, an experimental design is built on a 65-nm technology, where resistive open defects are intentionally injected. Automated test equipment measurements confirm the simulation results. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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