Fixed-frequency hysteretic buck converter with novel adaptive window control and transient response improvement
| Autor: | Liter Siek, Meng Jia, Zhuochao Sun |
|---|---|
| Přispěvatelé: | School of Electrical and Electronic Engineering, VIRTUS, IC Design Centre of Excellence |
| Jazyk: | angličtina |
| Rok vydání: | 2019 |
| Předmět: |
Adaptive control
Computer science time 0.3 mus Clock rate 02 engineering and technology Fixed-Frequency Hysteretic Buck Converter complementary metal–oxide–semiconductor process adaptive control 0202 electrical engineering electronic engineering information engineering fixed switching frequency fixed-frequency hysteretic buck converter Transient response output voltage switching convertors steady-state operation General Engineering current 400.0 mA transient response converter transient response time 020202 computer hardware & architecture CMOS phase-locked loop-based adaptive window control size 0.18 mum Electrical and electronic engineering [Engineering] frequency 10.0 MHz clocks Energy Engineering and Power Technology reference clock frequency voltage 3.0 V to 4.2 V PLL control Control theory output voltage regulation simulated switching frequency auxiliary circuit converter output loading dynamic monitoring novel adaptive window control Buck converter 020208 electrical & electronic engineering voltage control transient response improvement voltage 1.8 V CMOS integrated circuits phase locked loops Phase-locked loop lcsh:TA1-2040 time 0.4 mus Buck DC-DC Converter Transient (oscillation) lcsh:Engineering (General). Civil engineering (General) Software Voltage |
| Zdroj: | The Journal of Engineering (2019) |
| DOI: | 10.1049/joe.2018.5293 |
| Popis: | This study presents a fixed-frequency hysteretic buck converter designed and fabricated using 0.18-µm complementary metal–oxide–semiconductor process. With a phase-locked loop (PLL)-based adaptive window control, the proposed buck converter can achieve a fixed switching frequency, and this frequency can be tuned within a certain range through a reference clock frequency. Concurrently, a novel auxiliary circuit is proposed to monitor the converter's output loading dynamics to reduce the converter's transient recovery time. It will also help to regulate the output voltage at the steady-state operation as well. With the supply voltage ranging from 3 to 4.2 V and an output voltage of 1.8 V, the simulated switching frequency is maintained at 10 MHz because of the PLL control. The transient response time is only 0.3 and 0.4 µs for a 400 mA step-up load and step-down load, respectively. Agency for Science, Technology and Research (A*STAR) Nanyang Technological University Published version The author would like to acknowledge MediaTek Singapore Limited and EDB Singapore for JIP scholarship, and funding support from NTU-A*STAR Silicon Technologies Centre of Excellence under the program grant no. 11235100003. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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