Electrical Characteristics of a Reduced-Gate Structure Polycrystalline Silicon Thin Film Transistor Using Field-Aided Lateral Crystallization
Autor: | Duck-Kyun Choi, Kwang Jin Lee, Young-Bae Kim, Jung Sun You |
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Rok vydání: | 2010 |
Předmět: | |
Zdroj: | ECS Transactions. 33:173-181 |
ISSN: | 1938-6737 1938-5862 |
DOI: | 10.1149/1.3481234 |
Popis: | In order to reduce the leakage current in n-channel polycrystalline silicon thin film transistors processed by field-aided lateral crystallization, we applied a reduced gate structure that enables an offset region between the channel and source-drain. The structure in this study was much simpler than those of other methods in the sense that it could accomplish both offset-gate and Ni-offset effects simultaneously without employing any additional masks or processes. The leakage current decreased as the offset region length ΔL per side increased. When ΔL = 2 μm, which corresponded to 10 percent of the total channel length of L = 20 μm, the off-state leakage current decreased to 3.2 pA/μm at VD = 0.1 V and VG = -10 V, which is more than two orders of magnitude lower than that in the conventional structure. In addition to a reduction in leakage current, other device parameters did not change significantly. |
Databáze: | OpenAIRE |
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