Electrical Interconnection and Bonding by Nano-Locking
| Autor: | Frank G. Shi, Jielin Guo, Yu-Chou Shih |
|---|---|
| Rok vydání: | 2021 |
| Předmět: |
Materials science
General Chemical Engineering nano-locking 02 engineering and technology Dielectric Surface finish 01 natural sciences Article flip-chip LED Reliability (semiconductor) Electrical resistance and conductance 0103 physical sciences General Materials Science die attachment Composite material QD1-999 010302 applied physics Interconnection Contact resistance 021001 nanoscience & nanotechnology wet high temperature operating life (WHTOL) Chemistry lumen output Adhesive 0210 nano-technology Contact area junction temperature heterogeneous integration electrical contact resistance |
| Zdroj: | Nanomaterials, Vol 11, Iss 1589, p 1589 (2021) Nanomaterials Volume 11 Issue 6 |
| ISSN: | 2079-4991 |
| Popis: | The growing demand for increased chip performance and stable reliability calls for the development of novel off-chip interconnection and bonding methods that can process good electrical, thermal, and mechanical performance simultaneously as well as superior reliability. A chip bonding method with the concept of “nano-locking” (NL) is proposed: the two surfaces are locked together for electrical interconnection, and the connection is stabilized by a dielectric adhesive filled into nanoscale valleys on the interconnecting surfaces. The general applicability of this new method was investigated by applying the method to the die-substrate bonding of two different packages from two different manufacturers. Electrical, optical, and thermal performances as well as reliability tests were carried out. The surface morphology of the bonding package substrates plays an important role in determining the contact resistance at the bonding interfaces. It was shown that samples with different roughness height distribution on the metallic surfaces formed a different total number of contacts and the contact area between the two bonding surfaces under the same bond-line thickness (BLT): a larger number of contact area resulted in a reduced electrical resistance, and thus an improved overall device performance and reliability. |
| Databáze: | OpenAIRE |
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