Time-predictable distributed shared on-chip memory
| Autor: | Morten B. Petersen, Anthon V. Riber, Simon Thye Andersen, Martin Schoeberl |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
Realtime systems
Distributed shared memory Computer Networks and Communications Computer science business.industry Reading (computer) 020208 electrical & electronic engineering 02 engineering and technology Execution time Network-on-chip Distributed memory 020202 computer hardware & architecture Resource (project management) Shared memory Artificial Intelligence Hardware and Architecture Embedded system 0202 electrical engineering electronic engineering information engineering business Field-programmable gate array Software |
| Zdroj: | Petersen, M B, Riber, A V, Andersen, S T & Schoeberl, M 2019, ' Time-predictable distributed shared on-chip memory ', Microprocessors and Microsystems, vol. 71, 102896 . https://doi.org/10.1016/j.micpro.2019.102896 |
| ISSN: | 0141-9331 |
| DOI: | 10.1016/j.micpro.2019.102896 |
| Popis: | Multi-core processors for real-time systems need to have a time-predictable way of communicating. The use of a single, external shared memory is the standard for multi-core processor communication. However, this solution is hardly time-predictable. This paper presents a time-predictable solution for communication between cores, a distributed shared memory using a network-on-chip. The network-on-chip supports reading and writing data to and from distributed on-chip memory. This paper covers the implementation of time-predictable read requests on a network-on-chip. The network is implemented using static schedules, and time-division multiplexing, enabling predictions for worst-case execution time. The implementation attempts to keep buffering as low as possible to obtain a small footprint. The solution has been implemented and successfully synthesized with a multi-core system on an FPGA. Finally, we show resource and performance measurements. |
| Databáze: | OpenAIRE |
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