Memristor-based Edge Computing of ShuffleNetV2 for Image Classification
| Autor: | Shiqin Wang, Yuting Cao, Huanhuan Ran, Shiping Wen, Tingwen Huang, Pan Zhou |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2021 |
| Předmět: |
Physics
Computer Hardware & Architecture 0906 Electrical and Electronic Engineering 1006 Computer Hardware Memristor Topology Computer Graphics and Computer-Aided Design law.invention Threshold voltage Kernel (image processing) law Limiter Operational amplifier Electrical and Electronic Engineering Connection (algebraic framework) Software Voltage Diode |
| Popis: | In this article, we propose a memristor-based ShuffleNetV2 for image classification. Because of the low power consumption and high integration, this circuit is suitable for edge computing. The memristor-based ShuffleNetV2 is divided into four kinds of units, and each unit is composed by a series of basic memristive neural circuits, such as memristive convolutional neural networks (MCNNs), memristive batch normalization (MBN) layers, memristive fully connection (MFC) layers, rectified linear unit (ReLU) layers, max-pooling layers, etc. To solve the imbalance of required memristor crossbars in MCNN and the huge power consumption of the input voltage inverting, the inverters are shifted behind the memristor crossbar.This circuit uses $(\mathcal {M}+1)\times 2$ memristor crossbars instead of the original $(2\mathcal {M}+1)\times 1$ memristor crossbars. The world lines of memristor crossbars required can be reduced from $(2\mathcal {M}+1)$ to $(\mathcal {M}+1)$ . The number of inverters in MCNN for a kernel can be decreased to one, and the power consumption in MCNN is greatly decreased. The MBN is designed by combining operational amplifiers with memristors. An output limiter circuit is added behind the ReLU layer implemented by diode. The output voltage of the ReLU layer is limited to the threshold voltage $V_{p}$ of memristor. The memristive ShuffleNetV2 is established for image classification in experiments. The effectiveness of the circuit is verified on the FER2013 dataset along with the analysis of the memristor resources, calculation periods, and circuit power consumption of the network. The experimental results show that this that the inference time of this memristive ShuffleNetV2 could be as less as 137 ns with a max power consumption 2.8 $\mu \text{W}$ of a memristive neurons. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|