| Autor: |
Eshraghian, K., Blanksby, A., Sarmiento, R., Lim, C.C. |
| Jazyk: |
italština |
| Rok vydání: |
1994 |
| Předmět: |
|
| Zdroj: |
Eshraghian, K. ; Blanksby, A. ; Sarmiento, R. ; Lim, C.C. (1994) GaAs design methodology & performance estimates for very high speed circuits using normally-off classes of logic. In: Gallium Arsenide Applications Symposium. GAAS 1994, 28-30 April 1994, Turin, Italy. |
| Popis: |
This paper compares three compatible normally-off classes of digital logic, namely DCFL, SDCFL and SFFL, that have been found to be suitable for Gallium Arsenide VLSI implementation. A Merged Logic approach that exploits the advantages of each of the logic classes to provide superior circuit performance is demonstrated. A design methodology using Ring Notation for mapping of logic in a systematic way is also presented and the underlying principles highlighted using the design of a Polynomial Evaluator Processing Element. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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