ToF Estimation Based on Compressed Real-Time Histogram Builder for SPAD Image Sensors
| Autor: | A. Darie, Ion Vornicu, Ángel Rodríguez-Vázquez, Ricardo Carmona-Galan |
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| Přispěvatelé: | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
| Rok vydání: | 2019 |
| Předmět: | |
| Zdroj: | ISCAS idUS. Depósito de Investigación de la Universidad de Sevilla instname |
| Popis: | This paper presents a FPGA implementation of a novel depth map estimation algorithm for direct time-of-flight CMOS image sensors (dToF-CISs) based on single-photon avalanche-diodes (SPADs). Conventional ToF computation algorithms rely on complete ToF histograms. The next generation of high speed dToF-CIS is expected to have wide dynamic range and high depth resolution. Applications such as 3D imaging based on dToF-CISs require pixel-level ToF histograms which have to be stored by huge fully-random access memory (RAM) modules. The proposed shifted inter-frame histogram (SiFH) algorithm has the same accuracy but requires a memory footprint 128 times smaller than the conventional algorithm. Thus a much larger number of pixels can be resolved using limited block RAM resources of FPGAs. Moreover the overall frame rate is also remarkably improved compared to the scanning method. The proof of concept of the SiFH algorithm on 15 bits has been implemented on Spartan-3E. An automated testbench was developed to confirm that no ambiguity errors occur along the entire dynamic range. Office of Naval Research (USA) N00014-19-1-2156 Ministerio de Economía y Competitividad TEC2015-66878-C3-1-R Junta de Andalucía TIC 2338- 2013 |
| Databáze: | OpenAIRE |
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