Performance evaluation of high-speed interconnects using dense communication patterns
| Autor: | Soundarya Sivaramakrishnan, Rod Fatoohi, Jeffrey S. Vetter, Sumy Koshy, Ken Kardys |
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| Rok vydání: | 2006 |
| Předmět: |
Ethernet
Interconnection Xeon Computer Networks and Communications Computer science business.industry Node (networking) Network interface ComputerSystemsOrganization_PROCESSORARCHITECTURES Network topology Supercomputer Computer Graphics and Computer-Aided Design Theoretical Computer Science Set (abstract data type) Artificial Intelligence Hardware and Architecture Embedded system Cluster (physics) IBM business Software Computer network |
| Zdroj: | ICPP Workshops |
| ISSN: | 0167-8191 |
| DOI: | 10.1016/j.parco.2006.09.007 |
| Popis: | We study the performance of high-speed interconnects using a set of communication micro-benchmarks. The goal is to identify certain limiting factors and bottlenecks with these interconnects. Our micro-benchmarks are based on dense communication patterns with different communicating partners and varying degrees of these partners. We tested our micro-benchmarks on five platforms: an IBM system of 68-node 16-way Power3, interconnected by a SP switch2; another IBM system of 264-node 4-way Power PC 604e, interconnected by an SP switch; a Compaq cluster of 128-node 4-way ES40/EV67 processor, interconnected by an Quadrics interconnect; an Intel cluster of 16-node dual-CPU Xeon, interconnected by an Quadrics interconnect; and a cluster of 22-node Sun Ultra Sparc, interconnected by an Ethernet network. Our results show many limitations of these networks including the memory contention within a node as the number of communicating processors increased and the limitations of the network interface for communication between multiple processors of different nodes. |
| Databáze: | OpenAIRE |
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