A 10 MHz Relaxation Oscillator with a novel Jitter Suppression Comparator Autozeroing technique
| Autor: | Paolo Bruschi, Massimo Piotto, Giuseppe Manfredini, Mattia Cicalini, Alessandro Catania, Daniele Marchetti, Andrea Ria |
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| Rok vydání: | 2020 |
| Předmět: |
Fully-integrated
Materials science Comparator Clock signal business.industry 020208 electrical & electronic engineering Relaxation oscillator dBc Jitter suppression Low-power Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Integrated circuit Power (physics) law.invention CMOS law Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Optoelectronics business Jitter |
| Zdroj: | ICECS |
| Popis: | This paper presents a fully-integrated CMOS RC relaxation oscillator using an innovative Jitter Suppression Comparator Autozeroing technique. The oscillator, designed with a 0.18 um CMOS process from UMC, has been sized to provide a 10 MHz clock signal for low power, low cost integrated circuits. Simulations show that the proposed approach is able to provide an effective reduction of the accumulated jitter for long observation time (up to 10k cycles). The output frequency variation is 19.48 ppm/°C over a temperature range from - 40°C to 80 °C and 0.12 % for a supply voltage variation from 1.7 V to 1.9 V. The current consumption of the oscillator is 79 uA at 1.8 V. The proposed circuit shows a Figure-of-Merit of 144 dBc/Hz. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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