A 28nm FD-SOI Standard Cell 0.6-1.2V Open-Loop Frequency Multiplier for Low Power SoC Clocking
Autor: | Martin Cochet, Jean-Luc Autran, Pierre Schamberger, Damien Croain, Philipe Roche, Mehdi Naceur, Sylvain Clerc |
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Přispěvatelé: | Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP), Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS)-Aix Marseille Université (AMU), STMicroelectronics [Crolles] (ST-CROLLES), Bibliométrie, IM2NP, Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS) |
Jazyk: | angličtina |
Rok vydání: | 2016 |
Předmět: |
Standard cell
Computer science Frequency multiplier [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics 020208 electrical & electronic engineering Open-loop controller Silicon on insulator 02 engineering and technology Hardware_PERFORMANCEANDRELIABILITY 7. Clean energy 020202 computer hardware & architecture 0202 electrical engineering electronic engineering information engineering Electronic engineering Hardware_INTEGRATEDCIRCUITS [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics Frequency scaling Voltage Jitter |
Zdroj: | 2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) 2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2016, Unknown, Unknown Region. pp.1206-1209 ISCAS |
Popis: | IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, CANADA, MAY 22-25, 2016; International audience; This paper presents a new design for SoC clocking based on open-loop frequency multiplication. The architecture, fully implemented in 28nm FD-SOI standard cells, achieves frequency tracking within one input reference period making it a promising candidate for Dynamic Voltage and Frequency Scaling (DVFS) schemes. A calibration scheme is implemented for wide voltage range (0.6-1.2V) operation and to offset P&R and variability induced mismatch. Measurements at 0.6V (0.8/0.4V FBB) show a Fmax of 93MHz with a power of 2.91mW/MHz and a jitter of 2.7 % UI. |
Databáze: | OpenAIRE |
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