On the integration of design and test for chips embedding MEMS
Autor: | Salvador Mir, Benoit Charlot |
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Přispěvatelé: | Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA) |
Jazyk: | angličtina |
Rok vydání: | 1999 |
Předmět: |
Engineering
fault-based design-and-test 02 engineering and technology Hardware_PERFORMANCEANDRELIABILITY Fault modeling MEMS 0202 electrical engineering electronic engineering information engineering Electronic engineering embedded-MEMS Electrical and Electronic Engineering [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics chips defect-oriented Microelectromechanical systems business.industry 020208 electrical & electronic engineering Logic testing 020202 computer hardware & architecture Test (assessment) Hardware and Architecture Embedded system PACS 85.42 Embedding business Software |
Zdroj: | IEEE Design & Test IEEE Design & Test, IEEE, 1999, 16(4), pp.28-38. ⟨10.1109/54.808204⟩ |
ISSN: | 2168-2356 |
DOI: | 10.1109/54.808204⟩ |
Popis: | This article illustrates how fault-based, defect-oriented test approaches can be applied to the problem of testing the next generation of chips embedding MEMS. |
Databáze: | OpenAIRE |
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