Yield-driven power-delay-optimal CMOS full-adder design complying with automotive product specifications of PVT variations and NBTI degradations

Autor: Zia Abbas, Andreas Ripp, Mauro Olivieri
Rok vydání: 2016
Předmět:
Adder
Fabrication
delay
NBTI
Computer science
leakage
and optics
Monte Carlo method
Spice
Hardware_PERFORMANCEANDRELIABILITY
02 engineering and technology
Process variable
Automotive product
statistical variations
Hardware_INTEGRATEDCIRCUITS
0202 electrical engineering
electronic engineering
information engineering
atomic and molecular physics
optical and magnetic materials
Electrical and Electronic Engineering
Leakage (electronics)
electronic
Circuit sizing
CMOS
yield
electrical and electronic engineering
atomic and molecular physics
and optics
electronic
optical and magnetic materials
modeling and simulation
020208 electrical & electronic engineering
Atomic and Molecular Physics
and Optics
020202 computer hardware & architecture
Electronic
Optical and Magnetic Materials
Reliability engineering
Modeling and Simulation
Zdroj: Journal of Computational Electronics. 15:1424-1439
ISSN: 1572-8137
1569-8025
DOI: 10.1007/s10825-016-0878-2
Popis: We present the detailed results of the application of mathematical optimization algorithms to transistor sizing in a full-adder cell design, to obtain the maximum expected fabrication yield. The approach takes into account all the fabrication process parameter variations specified in an industrial PDK, in addition to operating condition range and NBTI aging. The final design solutions present transistor sizing, which depart from intuitive transistor sizing criteria and show dramatic yield improvements, which have been verified by Monte Carlo SPICE analysis.
Databáze: OpenAIRE
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