When processors get old: Evaluation of BTI and HCI effects on performance and reliability
Autor: | Raphaël David, Olivier Heron, Chiara Sandionigi, Clément Bertolini |
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Přispěvatelé: | Département d'Architectures, Conception et Logiciels Embarqués-LIST (DACLE-LIST), Laboratoire d'Intégration des Systèmes et des Technologies (LIST (CEA)), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Laboratoire d'Intégration des Systèmes et des Technologies (LIST) |
Jazyk: | angličtina |
Rok vydání: | 2013 |
Předmět: |
010302 applied physics
Engineering Performance degradation business.industry Performance and reliabilities Hot carrier injection Integrated circuits 01 natural sciences Degradation mechanism Reliability engineering Worst case scenario Degradation [SPI]Engineering Sciences [physics] Logic synthesis Temperature instability Logic gate Embedded system 0103 physical sciences Systems design business Reliability (statistics) Bias temperature instability Design time Hot-carrier injection Degradation (telecommunications) |
Zdroj: | 2013 IEEE 19th International Testing Symposium (IOLTS) Testing Symposium (IOLTS), Jul 2013, Chania, Crete, Greece. pp.185-186, ⟨10.1109/IOLTS.2013.6604076⟩ IOLTS |
Popis: | Conference of 2013 IEEE 19th International On-Line Testing Symposium, IOLTS 2013 ; Conference Date: 8 July 2013 Through 10 July 2013; Conference Code:99890; International audience; This paper investigates the problem of Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) on processors. We propose a performance- and reliability-aware methodology that evaluates the effects of these degradation mechanisms at design time. The performed analysis estimates the effects produced by the execution of applications, representing typical or worst case scenarios, or single instructions. As shown by the experimental results, our framework allows to estimate the performance degradation and to identify the areas of memory most subject to faults, with the objective of optimizing the system design and defining on-line strategies. |
Databáze: | OpenAIRE |
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