Truncated multipliers through power-gating for degrading precision arithmetic
| Autor: | Marco Re, Massimo Petricca, Pietro Albicocco, Alberto Nannarelli, Gian Carlo Cardarilli |
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| Rok vydání: | 2013 |
| Předmět: |
Signal processing
Power gating Truncated multipliers business.industry Resource constrained Electronic systems Power-gating Lower-power consumption Dissipation Settore ING-INF/01 - Elettronica Partial product Power consumption Logic gate Electronic engineering Multiplier (economics) Precision arithmetic Hardware_ARITHMETICANDLOGICSTRUCTURES Arithmetic business Digital signal processing Mathematics |
| Zdroj: | ACSSC |
| DOI: | 10.1109/acssc.2013.6810694 |
| Popis: | When reducing the power dissipation of resource constrained electronic systems is a priority, some precision can be traded-off for lower power consumption. In signal processing, it is possible to have an acceptable quality of the signal even introducing some errors. In this work, we apply power-gating to multipliers to obtain a programmable truncated multiplier. The method consists in disabling the least-significant columns of the multiplier by power-gating logic in the partial products generation and accumulation array. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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