BagNet: Berkeley Analog Generator with Layout Optimizer Boosted with Deep Neural Networks
| Autor: | Kourosh Hakhamaneshi, Nick Werblun, Pieter Abbeel, Vladimir Stojanovic |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2019 |
| Předmět: |
Signal Processing (eess.SP)
FOS: Computer and information sciences Computer Science - Machine Learning Forcing (recursion theory) Computer science Optical link 020208 electrical & electronic engineering Design flow Schematic Computer Science - Neural and Evolutionary Computing Sample (statistics) 02 engineering and technology 020202 computer hardware & architecture Machine Learning (cs.LG) Computer engineering 0202 electrical engineering electronic engineering information engineering FOS: Electrical engineering electronic engineering information engineering Hardware_INTEGRATEDCIRCUITS Parasitic extraction Neural and Evolutionary Computing (cs.NE) Electrical Engineering and Systems Science - Signal Processing Generator (mathematics) |
| Zdroj: | ICCAD |
| Popis: | The discrepancy between post-layout and schematic simulation results continues to widen in analog design due in part to the domination of layout parasitics. This paradigm shift is forcing designers to adopt design methodologies that seamlessly integrate layout effects into the standard design flow. Hence, any simulation-based optimization framework should take into account time-consuming post-layout simulation results. This work presents a learning framework that learns to reduce the number of simulations of evolutionary-based combinatorial optimizers, using a DNN that discriminates against generated samples, before running simulations. Using this approach, the discriminator achieves at least two orders of magnitude improvement on sample efficiency for several large circuit examples including an optical link receiver layout. Accepted on ICCAD 2019 Conference |
| Databáze: | OpenAIRE |
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