| Autor: |
Giovanni Boi, Lorenzo Tomasin, Fabio Padovan, Andrea Bevilacqua |
| Rok vydání: |
2021 |
| Předmět: |
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| Zdroj: |
2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). |
| DOI: |
10.1109/rfic51843.2021.9490439 |
| Popis: |
This paper presents an octacore DCO, implemented in a 28 nm CMOS technology, able to achieve an outstanding phase noise performance: −126 dBc/Hz at 1 MHz offset from the 10.7 GHz carrier with 173 mW power consumption. The design is scalable, as the network coupling the oscillator cores can be reconfigured allowing to switch off some cores to save power without incurring in any additional phase noise penalty other than the one expected from the reduction of the number of the active cores. The DCO achieves a 27% tuning range with 6 MHz frequency resolution. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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