Fully Digital On-Chip Wideband Background Calibration for Channel Mismatches in Time-Interleaved Time-Based ADCs
| Autor: | Okko Jarvinen, Ilia Kempi, Vishnu Unnikrishnan, Kari Stadius, Marko Kosunen, Jussi Ryynanen |
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| Přispěvatelé: | Jussi Ryynänen Group, Department of Electronics and Nanoengineering, Aalto-yliopisto, Aalto University, Tampere University, Electrical Engineering |
| Jazyk: | angličtina |
| Rok vydání: | 2022 |
| Předmět: |
digital calibration
time interleaving 213 Electronic automation and communications engineering electronics least mean-square (LMS) timing skew cyclic-coupled ring oscillator (CCRO) Electrical and Electronic Engineering mismatch time based analog-to-digital converter (ADC) finite-impulse response (FIR) |
| Popis: | This letter presents a fully integrated on-chip digital mismatch compensation system for time-based time-interleaved (TI) data converters. The proposed digital compensation features blind calibration of gain, offset, and timing mismatches. The implemented system uses time-based sampling clock mismatch detection, achieving convergence within 32K samples, which is on par with analog-assisted background methods. A specialized filter structure compensates for timing mismatches of magnitude up to 0.21 of the sampling period, nearly triple the range of other published digital compensation methods, and is effective for input signals up to 0.92 Nyquist bandwidth. The on-chip digital correction achieves suppression of all mismatch tones to levels below −60 dBc while running fully in the background. The operation is demonstrated with an 8× TI 2-GS/s analog-to-digital converter (ADC) prototype chip implemented in a 28-nm CMOS process. publishedVersion |
| Databáze: | OpenAIRE |
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