New prospects on high on-current and steep subthreshold slope for innovative Tunnel FET architectures
| Autor: | C. Le Royer, C. Diaz Llorente, Jing Wan, Gerard Ghibaudo, Sebastien Martinie, J.-P. Colinge, Maud Vinet, Sorin Cristoloveanu |
|---|---|
| Přispěvatelé: | Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]) |
| Jazyk: | angličtina |
| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
Materials science Dopant business.industry Silicon on insulator 02 engineering and technology 021001 nanoscience & nanotechnology Condensed Matter Physics 01 natural sciences Subthreshold slope Electronic Optical and Magnetic Materials Ion Anode Gate oxide 0103 physical sciences Materials Chemistry Optoelectronics Body region Electrical and Electronic Engineering [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics 0210 nano-technology business Quantum tunnelling ComputingMilieux_MISCELLANEOUS |
| Zdroj: | Solid-State Electronics Solid-State Electronics, 2019, 159, pp.26-37. ⟨10.1016/j.sse.2019.03.046⟩ Solid-State Electronics, Elsevier, 2019, 159, pp.26-37. ⟨10.1016/j.sse.2019.03.046⟩ |
| ISSN: | 0038-1101 |
| DOI: | 10.1016/j.sse.2019.03.046⟩ |
| Popis: | We propose three innovative SOI Tunnel FET architectures to solve the recurrent issue of low ION and degraded subthreshold slope measured on TFETs. These are evaluated and compared with a standard TFET structure (with lateral tunneling) using the Sentaurus TCAD tool. Extending the source (anode) at the bottom of the body region generates vertical band-to-band tunneling. Moreover, reducing the vertical distance between the extension and the gate oxide (Lrt) yields a very steep slope and higher ION compared to a device with only lateral tunneling, but only for gate lengths longer than 100 nm. Using an ultrahigh boron dopant concentration (1021 cm−3) thin layer at the bottom for extremely small body thickness (TSi |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|
Full Text from ScienceDirect