Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis
| Autor: | R. Wacquez, B. Dieny, G. Di Pendina, M. Kharbouche-Harrari, D. Aboulkassimi, J-M. Portal, Jérémy Postel-Pellerin |
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| Přispěvatelé: | SPINtronique et TEchnologie des Composants (SPINTEC), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), CEA Tech en région Sud (DSUD), CEA Tech en régions (CEA-TECH-Reg), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP), Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS) |
| Rok vydání: | 2019 |
| Předmět: |
IoT
Computer science Overhead (engineering) Context (language use) Cryptography 02 engineering and technology 01 natural sciences Hardware Implementation 0103 physical sciences PRESENT 0202 electrical engineering electronic engineering information engineering Hardware Security [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics Standby power 010302 applied physics Magnetoresistive random-access memory Hardware_MEMORYSTRUCTURES business.industry STT-MRAM 020202 computer hardware & architecture Resistive random-access memory Cipher CMOS Embedded system Node (circuits) Non-Volatile Memory business |
| Zdroj: | ISCAS 2019 IEEE International Symposium on Circuits and Systems (ISCAS) 2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, Sapporo, Japan. pp.1-5, ⟨10.1109/ISCAS.2019.8702734⟩ |
| DOI: | 10.1109/iscas.2019.8702734 |
| Popis: | International audience; Internet of Things (IoT) applications deployment relies on low-power circuits. Nowadays, on top of power consumption, security concern has become a real issue. LightWeight Cryptography (LWC) has been developed to answer this challenge. In the lightweight cryptographic landscape, the PRESENT algorithm exhibits low power and small area features. At the same time, emergent resistive memory technologies such as Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) seem to be a strong candidate for Flash replacement with advanced design features such as hybridization with CMOS. In this context, we propose a hybrid CMOS/STT-MRAM technology for PRESENT cryptographic circuit for normally-off IoT applications. We demonstrate that the hybrid implementation is more power-efficient than the CMOS implementation when switched off for a period longer than 49.1 ms for a 180 nm CMOS core process with an area overhead of x7. Based on this result, trends down to 28 nm node are studied and lead to outstanding performances with a power-effeciency of the hybrid version reached after 185 µs in standby mode. In this scenario, an energy of 6,1 pJ is sufficient to store data in the Non-Volatile Flip-Flops (NVFFs) with a reduced area overhead of x0.23. |
| Databáze: | OpenAIRE |
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