VLSI-cell placement technique for Architecture of Field Programmable Gate Array (FPGA) design

Autor:	VERMA, Avnesh, DHINGRA, Sunil, SONI, M. K.
Rok vydání:	2009
Předmět:	General Computer Science Hardware_INTEGRATEDCIRCUITS Field Programmable Gate Array (FPGA) Space Vector Pulse Width Modulation (SVPWM) Configurable Logic Blocks (CLBs) Look Up Table (LUT) Routing Insulated Gate Bipolar Transistor (IGBT) Electrical and Electronic Engineering Hardware_LOGICDESIGN
Zdroj:	Volume: 17, Issue: 3 327-336 Turkish Journal of Electrical Engineering and Computer Science
ISSN:	1303-6203 1300-0632
DOI:	10.3906/elk-0908-173
Popis:	The Field Programmable Gate Array (FPGA) is an on field programmable device which can be designed for different applications. Various types of software are available for its synthesis. The cell placement depends upon the designing and programming languages used for FPGA. In this paper cell placement technique of FPGA architecture is analyzed for the application of Space Vector Pulse Width Modulation (SVPWM) technique used in speed control of an induction motor. The modulation pulses are produced due to the various components activated and their interconnection in Configurable Logic Blocks (CLBs). Few of its components are so analyzed to find out the reason for their desired output response. This survey has also been conducted to find the correlation of LUTs and formulation of output.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a304153f94e64ef601161fba33bede57 https://doi.org/10.3906/elk-0908-173 Zobrazit plný text záznamu