Vertical 3D gallium nitride field-effect transistors based on fin structures with inverted p-doped channel
| Autor: | Hergo-Heinrich Wehmann, Feng Yu, Andreas Waag, Klaas Strempel, Andrey Bakin, Bernd Witzigmann, Friedhard Römer, Matteo Meneghini |
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| Rok vydání: | 2020 |
| Předmět: |
Materials science
Nanostructure business.industry Doping field-effect transistor Gallium nitride Condensed Matter Physics Electronic Optical and Magnetic Materials Fin (extended surface) chemistry.chemical_compound vertical electronics chemistry gallium nitride nanostructures Materials Chemistry Optoelectronics Field-effect transistor Electrical and Electronic Engineering business Communication channel |
| Zdroj: | Semiconductor Science and Technology. 36:014002 |
| ISSN: | 1361-6641 0268-1242 |
| Popis: | This paper demonstrates the first vertical field-effect transistor based on gallium nitride (GaN) fin structures with an inverted p-doped channel layer. A top-down hybrid etching approach combining inductively coupled plasma reactive ion etching and KOH-based wet etching was applied to fabricate regular fields of GaN fins with smooth a-plane sidewalls. The obtained morphologies are explained using a cavity step-flow model. A 3D processing scheme has been developed and evaluated via focussed ion beam cross-sections. The top-down approach allows the introduction of arbitrary doping profiles along the channel without regrowth, enabling the modulation of the channel properties and thus increasing the flexibility of the device concept. Here, a vertical npn-doping profile was used to achieve normally-off operation with an increased threshold voltage as high as 2.65 V. The p-doped region and the 3D gate wrapped around the sidewalls create a very narrow vertical electron channel close to the interface between dielectric and semiconductor, resulting in good electrostatic gate control, low leakage currents through the inner fin core and high sensitivity to the interface between GaN and gate oxide. Hydrodynamic transport simulations were carried out and show good agreement with the performed current–voltage and capacitance–voltage measurements. The simulation indicates a reduced channel mobility which we attribute to interface scattering being particularly relevant in narrow channels. We also demonstrate the existence of oxide and interface traps with an estimated sheet density of 3.2 × 1012 cm−2 related to the Al2O3 gate dielectric causing an increased subthreshold swing. Thus, improving the interface quality is essential to reach the full potential of the presented vertical 3D transistor concept. |
| Databáze: | OpenAIRE |
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