Software Time Reliability in the Presence of Cache Memories
| Autor: | Irune Agirre, Suzana Milutinovic, Francisco J. Cazorla, Tullio Vardanega, Jaume Abella, Mikel Azkarate-Askasua, Enrico Mezzetti |
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| Přispěvatelé: | Barcelona Supercomputing Center |
| Jazyk: | angličtina |
| Rok vydání: | 2017 |
| Předmět: |
Programari
Exploit Computer science Reliability (computer networking) Distributed computing Cache memory 02 engineering and technology Cache memories 01 natural sciences Theoretical Computer Science Probabilistic Timing Analysis Representativeness WCET Computer Science (all) Software 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Code (cryptography) 010302 applied physics business.industry End user Enginyeria elèctrica [Àrees temàtiques de la UPC] Probabilistic logic Static timing analysis 020202 computer hardware & architecture Cache business Ordinadors--Dispositius de memòria |
| Zdroj: | UPCommons. Portal del coneixement obert de la UPC Universitat Politècnica de Catalunya (UPC) Reliable Software Technologies – Ada-Europe 2017 ISBN: 9783319605876 Ada-Europe Recercat. Dipósit de la Recerca de Catalunya instname |
| DOI: | 10.1007/978-3-319-60588-3_15 |
| Popis: | The use of caches challenges measurement-based timing analysis (MBTA) in critical embedded systems. In the presence of caches, the worst-case timing behavior of a system heavily depends on how code and data are laid out in cache. Guaranteeing that test runs capture, and hence MBTA results are representative of, the worst-case conflictive cache layouts, is generally unaffordable for end users. The probabilistic variant of MBTA, MBPTA, exploits randomized caches and relieves the user from the burden of concocting layouts. In exchange, MBPTA requires the user to control the number of runs so that a solid probabilistic argument can be made about having captured the effect of worst-case cache conflicts during analysis. We present a computationally tractable Time-aware Address Conflict (TAC) mechanism that determines whether the impact of conflictive memory layouts is indeed captured in the MBPTA runs and prompts the user for more runs in case it is not. The research leading to these results has received funding from the European Community's FP7 [FP7/2007-2013] under the PROXIMA Project (www.proximaproject. eu), grant agreement no 611085. This work has also been partially supported by the Spanish Ministry of Science and Innovation under grant TIN2015- 65316-P and the HiPEAC Network of Excellence. Jaume Abella has been partially supported by the Ministry of Economy and Competitiveness under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717. |
| Databáze: | OpenAIRE |
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