1 GHz GaAs ADC building blocks
| Autor: | F. Thomas, F. Debrie, S. Ruggeri, P. Martin, M. Gloanec, J.M. Uro |
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| Rok vydání: | 2003 |
| Předmět: |
Engineering
Offset (computer science) Comparator business.industry Electrical engineering Analog-to-digital converter 4-bit Converters Sample and hold law.invention Data acquisition law Diode bridge Hardware_INTEGRATEDCIRCUITS Electronic engineering Nyquist–Shannon sampling theorem Hardware_ARITHMETICANDLOGICSTRUCTURES business Diode Voltage |
| Zdroj: | Proceedings of the IEEE 1988 Custom Integrated Circuits Conference. |
| DOI: | 10.1109/cicc.1988.20829 |
| Popis: | Commercial GaAs ICs for high-speed (6-bit, 1G-sample/s) data acquisition are under development, using a low-cost conventional D-MESFET technology. First-generation sample-and-holds (S/Hs) and comparators are currently available as samples. Diode bridge and FET switch S/Hs have been compared; best performances have been achieved with diode bridge switches: 1 ns, 6-bit. Comparators provide 6-bit sensitivity at 1 GHz, but require offset adjust. Second-generation ADC (analog-to-digital converter) building blocks are at the experimental stage. An autobiased differential input stage is suitable for 4-bit ADC. A dynamic cell involving autocalibration techniques required for 6-bit ADC, is at the experimental stage. Using these blocks, a 4-bit 1G-sample/s full Nyquist single-chip ADC, including a S/H, has been designed and is in fabrication. A 6-bit ADC is currently under design. > |
| Databáze: | OpenAIRE |
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