Spice simulation of passive protection in smart power ICs

Autor:	Maher Kayal, Camillo Stefanucci, Jean-Michel Sallese, Pietro Buccella
Rok vydání:	2015
Předmět:	Engineering business.industry Noise (signal processing) Spice Process (computing) Hardware_PERFORMANCEANDRELIABILITY Integrated circuit design Smart power power parasitic modeling noise coupling Hardware_INTEGRATEDCIRCUITS Key (cryptography) Electronic engineering business Substrate modeling
Zdroj:	MIXDES
DOI:	10.1109/mixdes.2015.7208571
Popis:	When designing in Smart Power technologies, TCAD simulations are mandatory to design effective passive protections against parasitic couplings due to minority carriers. The objective of this paper is to propose a spice-based approach to characterize electrical key parameters of a passive protection directly within standard IC design flow avoiding time consuming TCAD simulations. Our methodology consists in integrating a new substrate model in spice to enable designers to derive themselves process specific design rules and reduce substrate couplings. This methodology enables designers to access valuable results in the early stage of IC design, where before such results could be obtained only in the final verification step.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::97ae1fd650317811a6d2ac305c911103 https://doi.org/10.1109/mixdes.2015.7208571 Zobrazit plný text záznamu