From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip

Autor: Jad Modad, Pascal Benoit, Sophiane Senni, Guillaume Prenat, Kaan Sevin, Gregory Di Pendina, Francois Duhem, Guillaume Patrigeon, Pascal Nouet, Frederic Ouattara, Lionel Torres
Přispěvatelé: ADAptive Computing (ADAC), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), Smart Integrated Electronic Systems (SmartIES), SPINtronique et TEchnologie des Composants (SPINTEC), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)
Rok vydání: 2018
Předmět:
Zdroj: VLSI-SoC
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2018)
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2018), Oct 2018, Verona, Italy. pp.188-191, ⟨10.1109/VLSI-SoC.2018.8644875⟩
2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
IFIP International Conference on Very Large Scale Integration (VLSI-SoC 2018)
IFIP International Conference on Very Large Scale Integration (VLSI-SoC 2018), Oct 2018, Verona, Italy. pp.188-191, ⟨10.1109/VLSI-SoC.2018.8644875⟩
DOI: 10.1109/vlsi-soc.2018.8644875
Popis: International audience; "Beyond CMOS" is today one of the major research directions in semiconductor industries to address current integrated circuit issues. Many alternative technologies are currently under investigation to deal with the scaling limits of CMOS technology. This paper presents the design of a full system on chip based on a hybrid CMOS/Magnetic process. Spin-transfer-torque magnetic tunnel junctions are used to design different functions such as logic, memory, security and analog IP blocks.
Databáze: OpenAIRE