A Common Capacitor Based Three Level STATCOM and Design of DFIG Converter for a Zero-Voltage Fault Ride-Through Capability
Autor: | Suresh Chandra Satapathy, V. V. S. S. S. Chakravarthy, D. V. N. Ananth, Muhamad Nabil Hidayat, Naeem M. S. Hannoon, Kona Sivashankar, P. S. R. Chowdary |
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Jazyk: | angličtina |
Rok vydání: | 2021 |
Předmět: |
field oriented control (FOC)
General Computer Science Computer science Induction generator General Engineering Converters AC power Fault (power engineering) voltage compensation Doubly-fed induction generator (DFIG) law.invention TK1-9971 balanced and unbalanced faults Capacitor Electric power system law Control theory zero-voltage fault ride through Torque common-capacitor based STATCOM General Materials Science Transient (oscillation) Electrical engineering. Electronics. Nuclear engineering |
Zdroj: | IEEE Access, Vol 9, Pp 105153-105179 (2021) |
ISSN: | 2169-3536 |
Popis: | To meet the augmented load power demand, the doubly-fed induction generator (DFIG) based wind electrical power conversion system (WECS) is a better alternative. Further, to enhance the power flow capability and raise security margin in the power system, the STATCOM type FACTS devices can be adopted as an external reactive power source. In this paper, a three-level STATCOM coordinates the system with its dc terminal voltage is connected to the common back-to-back converters. Hence, a lookup table-based control scheme in the outer control loops is adopted in the Rotor Side Converter (RSC) and the grid side converter (GSC) of DFIG to improve power flow transfer and better dynamic as well as transient stability. Moreover, the DC capacitor bank of the STATCOM and DFIG converters connected to a common dc point. The main objectives of the work are to improve voltage mitigation, operation of DFIG during symmetrical and asymmetrical faults, and limit surge currents. The DFIG parameters like winding currents, torque, rotor speed are examined at 50%, 80% and 100% comparing with earlier works. Further, we studied the DFIG system performance at 30%, 60%, and 80% symmetrical voltage dip. Zero-voltage fault ride through is investigated with proposed technique under symmetrical and asymmetrical LG fault for super-synchronous (1.2 p.u.) speed and sub-synchronous (0.8 p.u.) rotor speed. Finally, the DFIG system performance is studied with different phases to ground faults with and without a three-level STATCOM. |
Databáze: | OpenAIRE |
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