Cryogenic Memory Architecture Integrating Spin Hall Effect based Magnetic Memory and Superconductive Cryotron Devices
| Autor: | Marco Colangelo, David McAllister, Rich Lazarus, Matthew Nguyen, Robert A. Buhrman, Reza Baghdadi, Shengjie Shi, Oleg A. Mukhanov, Sriharsha V. Aradhya, Karl K. Berggren, A. Wagner, Amir Jafari-Salim, Sean R. Cheng, Guilhem Ribeill, Graham E. Rowlands, Brenden A. Butters, Emily Toomey, Daniel Yohannes, Martin V. Gustafsson, Leonardo Ranzani, Thomas A. Ohki, Patrick Truitt, Lijun Zhu |
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| Jazyk: | angličtina |
| Rok vydání: | 2020 |
| Předmět: |
Josephson effect
Computer science CPU cache lcsh:Medicine 02 engineering and technology 7. Clean energy 01 natural sciences Article Electronic and spintronic devices 0103 physical sciences Memory architecture Overhead (computing) Cryotron 010306 general physics lcsh:Science Multidisciplinary business.industry lcsh:R Electrical engineering Energy consumption 021001 nanoscience & nanotechnology Exascale computing Electrical and electronic engineering Tunnel magnetoresistance Superconducting devices lcsh:Q 0210 nano-technology business |
| Zdroj: | Scientific Reports Scientific Reports, Vol 10, Iss 1, Pp 1-11 (2020) |
| ISSN: | 2045-2322 |
| Popis: | One of the most challenging obstacles to realizing exascale computing is minimizing the energy consumption of L2 cache, main memory, and interconnects to that memory. For promising cryogenic computing schemes utilizing Josephson junction superconducting logic, this obstacle is exacerbated by the cryogenic system requirements that expose the technology’s lack of high-density, high-speed and power-efficient memory. Here we demonstrate an array of cryogenic memory cells consisting of a non-volatile three-terminal magnetic tunnel junction element driven by the spin Hall effect, combined with a superconducting heater-cryotron bit-select element. The write energy of these memory elements is roughly 8 pJ with a bit-select element, designed to achieve a minimum overhead power consumption of about 30%. Individual magnetic memory cells measured at 4 K show reliable switching with write error rates below 10−6, and a 4 × 4 array can be fully addressed with bit select error rates of 10−6. This demonstration is a first step towards a full cryogenic memory architecture targeting energy and performance specifications appropriate for applications in superconducting high performance and quantum computing control systems, which require significant memory resources operating at 4 K. |
| Databáze: | OpenAIRE |
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