NoC-Based Multiprocessor Architecture for Mixed-Time-Criticality Applications
Autor: | Goossens, K.G.W., Koedam, M.L.P.J., Nelson, A.T., Sinha, S.S., Goossens, S., Li, Y., Breaban, G.D., van Kampenhout, J.R., Tavakoli Najafabadi, R., Valencia, J., Ahmadi Balef, H., Akesson, B., Stuijk, S., Geilen, M.C.W., Goswami, D., Nabi Najafabadi, M., Ha, S., Teich, J. |
---|---|
Přispěvatelé: | Electronic Systems, Cyber-Physical Systems Center Eindhoven, Embedded Control Systems Lab, Networked Embedded Systems Lab, CompSOC Lab- Predictable & Composable Embedded Systems |
Rok vydání: | 2016 |
Předmět: |
Interconnection
Cellular architecture Computer science business.industry 020208 electrical & electronic engineering Symmetric multiprocessor system 02 engineering and technology 020202 computer hardware & architecture Criticality Applications architecture Embedded system Arbitration 0202 electrical engineering electronic engineering information engineering Software architecture business Multiprocessor architecture |
Zdroj: | Handbook of Hardware/Software Codesign ISBN: 9789401773584 Handbook of hardware/software codesign, 491-530 STARTPAGE=491;ENDPAGE=530;TITLE=Handbook of hardware/software codesign Handbook of Hardware/Software Codesign |
DOI: | 10.1007/978-94-017-7358-4_17-1 |
Popis: | In this chapter we define what a mixed-time-criticality system is and what its requirements are. After defining the concepts that such systems should follow, we described CompSOC, which is one example of a mixed-time-criticality platform. We describe, in detail, how multiple resources, such as processors, memories, and interconnect, are combined into a larger hardware platform, and especially how they are shared between applications using different arbitration schemes. Following this, the software architecture that transforms the single hardware platform into multiple virtual execution platforms, one per application, is described. |
Databáze: | OpenAIRE |
Externí odkaz: |