OMHI 2012: First international workshop on on-chip memory hierarchies and interconnects: organization, management and implementation
| Autor: | Sahuquillo Borrás, Julio, Gómez Requena, María Engracia, Petit Martí, Salvador Vicente |
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| Jazyk: | angličtina |
| Rok vydání: | 2013 |
| Předmět: |
Hardware_MEMORYSTRUCTURES
Flat memory model Memory hierarchy Computer science Cache-only memory architecture Uniform memory access Semiconductor memory ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES Non-uniform memory access Physical address Memory management Shared memory Computer architecture Hardware_INTEGRATEDCIRCUITS Interleaved memory Distributed memory Computing with Memory Dram memory |
| Zdroj: | RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia instname Lecture Notes in Computer Science ISBN: 9783642369483 Euro-Par Workshops |
| Popis: | Current CMPs include high amounts of on-chip memory storage, organized either as caches or main memory to avoid the huge latencies of accessing offchip DRAM memory. To address internal data access latencies, a fast on-chip network interconnects the memory hierarchy within the processor chip. As a consequence, performance, area, and power consumption of current chip multiprocessors (CMPs) are highly dominated by the on-chip memory hierarchy and interconnect design. This problem aggravates with the increasing number of cores since a wider and likely deeper on-chip memory hierarchy is required. |
| Databáze: | OpenAIRE |
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