| Autor: |
M. Honda, A. Yamagiwa, Akira Tanaka, H. Shinohara, Yuji Shirai, T. Hatada, Yamada Kunpei |
| Rok vydání: |
2002 |
| Předmět: |
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| Zdroj: |
Proceedings of IEEE 43rd Electronic Components and Technology Conference (ECTC '93). |
| DOI: |
10.1109/ectc.1993.346859 |
| Popis: |
A CPU chip-on-board module for low and midrange computers is described. The module consists of a CPU bare chip, 24 SRAM's packaged in SOJ packages, and some decoupling capacitors. The module substrate is a printed circuit board (PCB) made of bismaleimide-triazine resin. The module (156 mm/spl times/58 mm) consists of four signal metal layers and four power/ground metal layers. A square clearance hole (17 mm/spl times/17 mm) for the CPU is formed in the central part of the PCB. A thermal spreading metal is glued to the PCB from the rear side, covering the square hole, and the CPU chip is die-bonded onto the metal plate. The thermal resistance can be made smaller than 2/spl deg/C/W with 0.4 m/s of wind velocity. Numerical analysis of electrical characteristics of the module shows that it can reduce signal delay time from the CPU to cache memories by 10% compared with that of a daughter board type module with the CPU packaged in a pin-grid array package. It is estimated that simultaneously switched noise can be reduced by 60% from that of the daughter board type module. > |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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