Frequency Doubler and Universal Logic Gate Based on Two-Dimensional Transition Metal Dichalcogenide Transistors with Low Power Consumption
| Autor: | Do Kyung Hwang, Young Tack Lee, Jisu Jang, Jongtae Ahn, Jae Won Shim, Tae Wook Kim, Takashi Taniguchi, Kenji Watanabe, Hyun-Soo Ra |
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| Rok vydání: | 2021 |
| Předmět: |
Materials science
business.industry Frequency multiplier Gate dielectric Transistor NAND gate Universal logic Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology 010402 general chemistry 021001 nanoscience & nanotechnology NAND logic 01 natural sciences 0104 chemical sciences law.invention law Logic gate Hardware_INTEGRATEDCIRCUITS Equivalent circuit Optoelectronics General Materials Science 0210 nano-technology business Hardware_LOGICDESIGN |
| Zdroj: | ACS Applied Materials & Interfaces. 13:7470-7475 |
| ISSN: | 1944-8252 1944-8244 |
| DOI: | 10.1021/acsami.0c21222 |
| Popis: | Two-dimensional transition metal dichalcogenide semiconductors are very promising candidates for future electronic applications with low power consumption due to a low leakage current and high on-off current ratio. In this study, we suggest a complementary circuit consisting of ambipolar WSe2 and n-MoS2 field-effect transistors (FETs), which demonstrate dual functions of a frequency doubler and single inversion AND (SAND) logic gate. In order to reduce the power consumption, a high-quality thin h-BN single crystal is used as a gate dielectric that leads to a low operating voltage of less than 5 V. By combining the low operating voltage with a low operating current in the complementary circuit, a low power consumption of 300 nW (a minimum of 10 pW) has been achieved, which is a significant improvement compared to the tens of μW consumed by a graphene channel. The complementary circuit shows the effective frequency doubling of the input with a dynamic range from 20 to 100 Hz. Furthermore, this circuit satisfies all the truth tables of a SAND logic gate that can be used as a universal logic gate like NAND. Considering that the NAND logic gate generally consists of four transistors, it is significantly advantageous to implement the equivalent circuit SAND logic gate with only two FETs. Our results open up possibilities for analog- and logic-circuit applications based on low-dimensional semiconductors. |
| Databáze: | OpenAIRE |
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