| Popis: |
In this work a semi-automatic approach for the optimization of hardware architectures of safety-critical embedded systems is presented that supports developers in extending already existing systems with additional functionality given as software tasks. A two-tier optimization process explores the design space for valid allocations of the software tasks to the hardware architecture. The method exploits that large embedded systems typically are hierarchically composed of hardware subsystems: A global optimization step computes pre-allocations of all software tasks onto subsystems based on an abstract notion of the computation capacity. Separately for each subsystem, those tasks are then allocated to processors by local optimization steps such that they are schedulable and all constraints are satisfied. For both the global and the local optimization problem exact optimization methods bundled with experimental results are presented. |
