An Overview of Hardware Acceleration Techniques for 5G Functions
| Autor: | Nicola Andriolli, Justine Cris Borromeo, Luca Valcarenghi, Koteswararao Kondepu |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
OpenCL
Offloading business.industry Computer science media_common.quotation_subject 5G Hardware acceleration RAN 020206 networking & telecommunications 02 engineering and technology Virtualization computer.software_genre Cyclic prefix Acceleration Upgrade Embedded system 0202 electrical engineering electronic engineering information engineering business Function (engineering) Field-programmable gate array computer Throughput (business) media_common |
| Zdroj: | ICTON |
| DOI: | 10.1109/icton51198.2020.9203242 |
| Popis: | Network Function Virtualisation (NFV) is emerging as a promising solution for lowering capital expenditures and ease network function upgrade. However, typical virtualised CPUs cannot provide the processing performance required by some network functions. Thus, some type of optimized acceleration is needed. In this paper, an overview of OpenCL-based hardware acceleration techniques for 5G functions, specifically IFFT and Cyclic Prefix Addition Process, is provided. Implementations and possible optimization are discussed. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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